170 tm march 1997 hd-15531/883 cmos manchester encoder-decoder features ? this circuit is processed in accordance to mil-std- 883 and is fully conformant under the provisions of paragraph 1.2.1. ? support of mil-std-1553 ? data rate (15531b) . . . . . . . . . . . . . . . .2.5 megabit/sec ? data rate (15531) . . . . . . . . . . . . . . . . .1.25 megabit/sec ? variable frame length to 32-bits ? sync identification and lock-in ? separate manchester ii encode, decode ? low operating power . . . . . . . . . . . . . . . . . 50mw at 5v description the intersil hd-15531/883 is a high performance cmos device intended to service the requirements of mil-std- 1553 and similar manchester ii encoded, time division multi- plexed serial data protocols. this lsi chip is divided into two sections, an encoder and a decoder. these sections oper- ate independently of each other, except for the master reset and word length functions. this circuit provides many of the requirements of mil-std-1553. the encoder produces the sync pulse and the parity bit as well as the encoding of the data bits. the decoder recognizes the sync pulse and identi- fies it as well as decoding the data bits and checking parity. the hd-15531/883 also surpasses the requirements of mil- std-1553 by allowing the word length to be programmable (from 2 to 28 data bits). a frame consists of three bits for sync followed by the data word (2 to 28 data bits) followed by one bit of parity, thus, the frame length will vary from 6 to 32 bit periods. this chip also allows selection of either even or odd parity for the encoder and decoder separately. this integrated circuit is fully guaranteed to support the 1mhz data rate of mil-std-1553 over both temperature and voltage. for high speed applications the 15531b will support a 2.5 megabit/sec data rate. the hd-15531/883 can also be used in many party line digi- tal data communications applications, such as a local area network or an environmental control system driven from a single twisted pair or fiber optic cable throughout a building. ordering information package temperature range 1.25mbit/sec 2.5mbit/sec pkg. no. cerdip -55 o c to +125 o c hd1-15531/883 hd1-15531b/883 f40.6 fn2962.1
171 pinout hd-15531/883 (cerdip) top view 13 1 2 3 4 5 6 7 8 9 10 11 12 14 15 16 17 18 19 20 take data? vcc valid word take data serial data out synchr data synchr data sel synchr clk bipolar zero in bipolar one in unipolar data in decoder shift clk synchr clk sel decoder clk transition sel nc command sync decoder parity sel decoder reset count c0 33 34 35 36 37 38 39 40 32 31 30 29 24 25 26 27 28 21 22 23 count c1 data sync encoder clk count c4 nc encoder shift clk send clk in send data encoder parity sel sync sel encoder enable serial data in count 2 master reset gnd count c3 6 out bipolar one out bipolar zero out output inhibit block diagrams encoder 2 6 v cc 25 27 32 bipolar one out bipolar zero out sync select encoder enable encoder shift clk send data serial data in 34 28 29 31 encoder clk 37 gnd master reset send clk in 21 22 33 24 6 out 1 26 output inhibit 30 character bit counter encoder parity select 20 40 23 36 39 c 0 c 1 c 2 c 3 c 4 former hd-15531/883
172 decoder block diagrams (continued) bipolar one in bipolar decoder master 13 12 11 9 15 synchronizer 8 10 22 decoder synchronous synchronous decoder valid word serial take data command data sync 4 17 5 2 16 19 decoder reset 14 3 take data parity 20 40 23 36 39 bit counter clock 7 8 synchronous synchronous c0 c1 c2 c3 c4 transition finder data select gate parity character identifier bit unipolar data in zero in clk clk select clk clk select reset data out select shift clk check rate clk select data data data select 38 hd-15531/883
173 absolute maximum ratings thermal information supply voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +7.0v input, output or i/o voltage . . . . . . . . . . . gnd -0.5v to vcc +0.5v esd classification . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . class 1 thermal resistance ja jc cerdip package . . . . . . . . . . . . . . . . . . 35 o c/w 9 o c/w maximum storage temperature range . . . . . . . . .-65 o c to +150 o c maximum junction temperature. . . . . . . . . . . . . . . . . . . . . . +175 o c maximum lead temperature (soldering 10s). . . . . . . . . . . . +300 o c die characteristics gate count . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 250 gates caution: stresses above those listed in ?absolute maximum ratings? may cause permanent damage to the device. this is a stress o nly rating and operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not i mplied. operating conditions supply voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +4.5v to +5.5v operating temperature range (t a ). . . . . . . . . . . . -55 o c to +125 o c encoder/decoder clock rise time (tecr, tdcr) . . . . . . . 8ns max encoder/decoder clock fall time (tecf, tdcf) . . . . . . . . 8ns max sync. transition span (td2). . . . . . . . . . . 18 tdc typical, (note 1) short data transition span (td4). . . . . . . . 6 tdc typical, (note 1) long data transition span (td5) . . . . . . . 12 tdc typical, (note 1) table 1. hd-15531/883, hd-15531b/883 dc electrical performance specifications parameter symbol test conditions group a subgroups temperature limits units min max input low voltage vil vcc = 4.5v and 5.5v 1, 2, 3 -55 o c t a +125 o c - 0.2 vcc v input high voltage vih vcc = 4.5v and 5.5v 1, 2, 3 -55 o c t a +125 o c 0.7 vcc - v input low clock voltage vilc vcc = 4.5v and 5.5v 1, 2, 3 -55 o c t a +125 o c - gnd +0.5 v input high clock voltage vihc vcc = 4.5v and 5.5v 1, 2, 3 -55 o c t a +125 o c vcc -0.5 - v output low voltage vol iol = +1.8ma, vcc = 4.5v (note 2) 1, 2, 3 -55 o c t a +125 o c- 0.4 v output high voltage voh ioh = -3.0ma, vcc = 4.5v (note 2) 1, 2, 3 -55 o c t a +125 o c2.4 - v input leakage current ii vi = vcc or gnd, vcc = 5.5v 1, 2, 3 -55 o c t a +125 o c -1.0 +1.0 a standby supply current iccsb vin = vcc = 5.5v, outputs open 1, 2, 3 -55 o c t a +125 o c- 2 ma functional test ft (note 3) 7, 8 -55 o c t a +125 o c- - - notes: 1. tdc = decoder clock period = 1/fdc. 2. interchanging of force and sense conditions is permitted. 3. tested as follows: f = 15mhz, vih = 70% vcc, vil = 20% vcc, cl = 50pf, voh vcc/2 and vol vcc/2. table 2. hd-15531/883, hd-15531b/883 ac electrical performance specifications parameter symbol (note 2) condi-tions group a sub- groups temperature hd-15531/883 hd-15531b/883 units min max min max encoder timing encoder clock frequency fec vcc = 4.5v and 5.5v 9, 10, 11 -55 o c t a +125 o c- 15 - 30mhz send clock frequency fesc vcc = 4.5v and 5.5v 9, 10, 11 -55 o c t a +125 o c - 2.5 - 5.0 mhz hd-15531/883
174 encoder data rate fed vcc = 4.5v and 5.5v 9, 10, 11 -55 o c t a +125 o c - 1.25 - 2.5 mhz master reset pulse width tmr vcc = 4.5v and 5.5v 9, 10, 11 -55 o c t a +125 o c 150 - 150 - ns shift clock delay te1 vcc = 4.5v and 5.5v 9, 10, 11 -55 o c t a +125 o c - 125 - 80 ns serial data setup te2 vcc = 4.5v and 5.5v 9, 10, 11 -55 o c t a +125 o c75 - 50 - ns serial data hold te3 vcc = 4.5v and 5.5v 9, 10, 11 -55 o c t a +125 o c75 - 50 - ns enable setup te4 vcc = 4.5v and 5.5v 9, 10, 11 -55 o c t a +125 o c90 - 90 - ns enable pulse width te5 vcc = 4.5v and 5.5v 9, 10, 11 -55 o c t a +125 o c 100 - 100 - ns sync setup te6 vcc = 4.5v and 5.5v 9, 10, 11 -55 o c t a +125 o c55 - 55 - ns sync pulse width te7 vcc = 4.5v and 5.5v 9, 10, 11 -55 o c t a +125 o c 150 - 150 - ns send data delay te8 vcc = 4.5v and 5.5v 9, 10, 11 -55 o c t a +125 o c0 50 0 50ns bipolar output delay te9 vcc = 4.5v and 5.5v 9, 10, 11 -55 o c t a +125 o c - 130 - 130 ns enable hold te10 vcc = 4.5v and 5.5v 9, 10, 11 -55 o c t a +125 o c10 - 10 - ns sync hold te11 vcc = 4.5v and 5.5v 9, 10, 11 -55 o c t a +125 o c95 - 95 - ns decoder timing decoder clock frequency fdc vcc = 4.5v and 5.5v 9, 10, 11 -55 o c t a +125 o c- 15 - 30mhz decoder sync clock fds vcc = 4.5v and 5.5v 9, 10, 11 -55 o c t a +125 o c - 2.5 - 5.0 mhz decoder data rate fdd vcc = 4.5v and 5.5v 9, 10, 11 -55 o c t a +125 o c - 1.25 - 2.5 mhz decoder re- set pulse width tdr vcc = 4.5v and 5.5v 9, 10, 11 -55 o c t a +125 o c 150 - 150 - ns decoder re- set setup time tdrs vcc = 4.5v and 5.5v 9, 10, 11 -55 o c t a +125 o c75 - 75 - ns decoder re- set hold time tdrh vcc = 4.5v and 5.5v 9, 10, 11 -55 o c t a +125 o c10 - 10 - ns master reset pulse tmr vcc = 4.5v and 5.5v 9, 10, 11 -55 o c t a +125 o c 150 - 150 - ns bipolar data pulse width td1 vcc = 4.5v and 5.5v 9, 10, 11 -55 o c t a +125 o c tdc +10 (note 1) - tdc +10 (note 1) -ns one zero overlap td3 vcc = 4.5v and 5.5v 9, 10, 11 -55 o c t a +125 o c - tdc-10 (note 1) - tdc-10 (note 1) ns sync delay (on) td6 vcc = 4.5v and 5.5v 9, 10, 11 -55 o c t a +125 o c -20 110 -20 110 ns table 2. hd-15531/883, hd-15531b/883 ac electrical performance specifications (continued) parameter symbol (note 2) condi-tions group a sub- groups temperature hd-15531/883 hd-15531b/883 units min max min max hd-15531/883
175 take data delay (on) td7 vcc = 4.5v and 5.5v 9, 10, 11 -55 o c t a +125 o c 0 110 0 110 ns serial data out delay td8 vcc = 4.5v and 5.5v 9, 10, 11 -55 o c t a +125 o c- 80 - 80ns sync delay (off) td9 vcc = 4.5v and 5.5v 9, 10, 11 -55 o c t a +125 o c 0 110 0 110 ns take data delay (off) td10 vcc = 4.5v and 5.5v 9, 10, 11 -55 o c t a +125 o c 0 110 0 110 ns valid word delay td11 vcc = 4.5v and 5.5v 9, 10, 11 -55 o c t a +125 o c 0 110 0 110 ns sync clock to shift clock delay td12 vcc = 4.5v and 5.5v 9, 10, 11 -55 o c t a +125 o c- 75 - 75ns sync data setup td13 vcc = 4.5v and 5.5v 9, 10, 11 -55 o c t a +125 o c75 - 75 - ns notes: 1. tdc = decoder clock period = 1/fdc. 2. ac testing as follows: vih = 70% vcc, vil = 20% vcc; input rise/fall times driven at 1ns/v; timing reference levels: vcc/2; output load: cl = 50pf. table 2. hd-15531/883, hd-15531b/883 ac electrical performance specifications (continued) parameter symbol (note 2) condi-tions group a sub- groups temperature hd-15531/883 hd-15531b/883 units min max min max table 3. hd-15531/883, hd-15531b/883 electrical performance specifications parameter symbol conditions notes temperature limits units min max input capacitance ci vcc = open, f = 1mhz, all measure- ments referenced to device gnd 1t a = +25 o c - 25 pf input/output capaci- tance cio vcc = open, f = 1mhz, all measure- ments referenced to device gnd 1t a = +25 o c - 25 pf operating power supply current iccop vcc = 5.5v, f = 1mhz 1, 2 -55 o c t a +125 o c-10ma notes: 1. the parameters listed in table 3 are controlled via design or process parameters are characterized upon initial design and af ter major process and/or design changes. 2. guaranteed but not 100% tested. table 4. applicable subgroups conformance groups method subgroups initial test 100%/5004 - interim test 100%/5004 1, 7, 9 pda 100%/5004 1 final test 100%/5004 2, 3, 8a, 8b, 10, 11 group a samples/5005 1, 2, 3, 7, 8a, 8b, 9, 10, 11 groups c & d samples/5005 1, 7, 9 hd-15531/883
176 burn-in circuit hd1-15531/883 cerdip notes: 1. vcc = 5.5v 0.5v. 2. vih = 4.5v 10%. 3. vil = -0.2v to +0.4v. 4. r = 47k ? 5%. 5. f0 = 100khz 10%. 13 1 2 3 4 5 6 7 8 9 10 11 12 14 15 16 17 18 19 20 vcc a a a a v cc gnd vcc fo gnd gnd a vcc nc a gnd gnd vcc 28 40 39 38 37 36 35 34 33 32 31 30 29 27 26 25 24 23 22 21 vcc vcc a fo gnd a a vcc gnd vcc gnd vcc a vcc gnd gnd r r r r r r r r r r r r r nc r r a vcc gnd r r r r r r r r r r hd-15531/883
177 all intersil u.s. products are manufactured, assembled and tested utilizing iso9000 quality systems. intersil corporation?s quality certifications can be viewed at www.intersil.com/design/quality intersil products are sold by description only. intersil corporation reserves the right to make changes in circuit design, soft ware and/or specifications at any time without notice. accordingly, the reader is cautioned to verify that data sheets are current before placing orders. information furnishe d by intersil is believed to be accurate and reliable. however, no responsibility is assumed by intersil or its subsidiaries for its use; nor for any infringements of paten ts or other rights of third parties which may result from its use. no license is granted by implication or otherwise under any patent or patent rights of intersil or its subsidiari es. for information regarding intersil corporation and its products, see www.intersil.com die characteristics die dimensions: 155 x 195 x 19 1mils metallization: type: si-al thickness: 11k ? 2k ? glassivation: type: sio 2 thickness: 8k ? 1k ? worst case current density: 2.0 x 10 5 a/cm 2 metallization mask layout hd-15531/883 valid word count c1 take data? count c4 vcc encoder clk count c3 encoder shift clk send clk in send data encoder parity sel sync sel encoder enable serial data in bipolar one out output inhibit count master count decoder gnd 6 out command sync transition sel decoder shift clk unipolar data in bipolar one in bipolar zero in synchr clk sel decoder clk synchr clk synchr data sel synchr data serial data out bipolar zero out 2 reset c0 decoder parity sel reset take data data sync hd-15531/883
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